********************************
* Copyright:                   *
* Vishay Intertechnology, Inc. *
********************************
*Dec 22, 2014
*ECN S14-2507, Rev. A
*This document is intended as a SPICE modeling guideline and does not
*constitute a commercial product datasheet. Designers should refer to the
*appropriate datasheet of the same number for guaranteed specification
*limits.
.SUBCKT Si3429EDV D G S
x1  D G S Si3429EDV_mos
x2  G S   Si3429EDV_esd
.ENDS Si3429EDV
.SUBCKT Si3429EDV_mos D G S 
M1 3 GX S S PMOS W= 4462500u L= 0.3u 
M2 S GX S D NMOS W= 4462500u L= 0.33u 
R1 D 3 1.329e-02 3.125e-03 2.933e-07 
CGS GX S 1.456e-09 
CGD GX D 1.276e-10 
RG G GY 1m 
RTCV 100 S 1e6 1.423e-04 7.097e-07 
ETCV GY GX 100 200 1 
ITCV S 100 1u 
VTCV 200 S 1 
DBD D S DBD 4462500u 
**************************************************************** 
.MODEL PMOS PMOS ( LEVEL = 3 TOX = 2e-8 
+ RS = 0 KP = 3.871e-06 NSUB = 7.022e+14 
+ KAPPA = 1.130e-03 NFS = 3.416e+11 
+ LD = 0 IS = 0 TPG = -1 CAPOP = 12 ) 
*************************************************************** 
.MODEL NMOS NMOS ( LEVEL = 3 TOX = 2e-8 
+NSUB = 3.327e+16 IS = 0 TPG = -1 CAPOP = 12 ) 
**************************************************************** 
.MODEL DBD D ( 
+FC = 0.1 TT = 3.522e-08 TREF = 25 BV = 21 
+RS = 7.269e-02 N = 1.508e+00 IS = 1.135e-07 
+EG = 9.318e-01 XTI = -2.013e+00 TRS = 8.170e-04 
+CJO = 2.000e-11 VJ = 3.000e-01 M = 3.075e-01 ) 
.ENDS Si3429EDV_mos
.subckt Si3429EDV_esd 1 2 
r1 1 9 1.000e+04 -4.000e-02 
d1 2 9 dleak 
.MODEL dleak d (IS = 8.607e-09 XTI = 5.953e+02 EG = 1.17 
+ TREF = 25 TCV = 0 N = 6.677e+01 BV = 50) 
r2 1 10 9.52e+01 -2.043e-04 
d3 11 10 dout 
d4 11 2 dout 
.MODEL dout D (IS = 1.257e-14 XTI = -1.613e+02 EG = 1.17 
+ TREF = 25 TCV = 1.298e-03 N = 1.382e+00 BV = 1.220e+01 
+ TLEV = 1) 
.ends Si3429EDV_esd 